Our client is a world-leading technology company at the forefront of semiconductor innovation, powering some of the most advanced digital systems in the industry. Their work touches billions of users globally, driving nextgeneration performance and efficiency across highly complex hardware and software ecosystems.
They are seeking a Design Verification Engineer with deep expertise in SystemVerilog/UVM and digital ASIC verification. This role is critical for ensuring robust, reusable verification environments, achieving high functional coverage, and supporting rapid innovation in complex hardware designs that operate at massive scale.
This position is central to delivering highperformance, reliable digital hardware at global scale. You will have the opportunity to shape verification strategies, implement reusable test environments, and contribute to cuttingedge projects that power complex systems used by millions worldwide. This is an environment where technical expertise meets massive realworld impact.
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